1. Field of the Invention
The invention relates to a method of fabricating a shallow trench isolation (STI) structure, and more particularly to a method of fabricating a shallow trench isolation structure that can prevent micro-scratches from occurring on the STI structure.
2. Description of the Related Art
STI structure is widely used in semiconductor process of 0.25 .mu.m. The fabrication of the STI structure includes the step of anisotropically etching a trench within a substrate, depositing an oxide layer in the trench and planarizing the oxide layer by chemical mechanical polishing (CMP) to provide an even surface.
FIGS. 1A-1F are side views illustrating fabrication of a STI structure in prior art. Referring to FIG. 1A, a pad oxide layer 11 is thermally formed on a substrate 10. A silicon nitride layer 12 is formed on the pad oxide layer 11 by chemical vapor deposition (CVD).
Referring to FIG. 1B, a patterned photoresist layer 13 is formed on the silicon nitride layer 12. Using the photoresist layer 13 as an etching mask, a portion of the silicon nitride layer 12, the pad oxide layer 11 and the substrate 10 are removed to form a trench 16 within the substrate 10.
Referring to FIG. 1C, the photoresist layer 13 of FIG. 1B is removed. A liner oxide layer 14 is formed on the sidewall of the trench 16.
Referring to FIG. 1D, a silicon oxide layer 15 is formed on the liner oxide layer 14 and the silicon nitride layer 12 to fill the trench 16.
Referring to FIG. 1E, a portion of the silicon oxide layer 15 is removed by CMP to expose the silicon nitride layer 12.
Referring to FIG. 1F, the silicon nitride layer 12 and the pad oxide layer 11 are removed, respectively, by wet etching and the STI structure is completed.
The silicon nitride layer 12 is used as a stop layer and CMP is performed on the silicon oxide layer 15 in the process as described above. During the process of CMP, since the hard material of the silicon nitride layer 12 is polished by CMP, silicon nitride particles are easily produced from polishing and cause micro-scratch 17 to occur on the silicon oxide layer 15a. Stringer is thus produced on a polysilicon layer subsequently deposited and a short occurs in the semiconductor device. Otherwise, the in the foregoing process, it is necessary to remove the silicon nitride layer 12 by dry etching, which increases both the cost of the fabrication and cycle time of the process. In addition, stress between the silicon nitride layer 12, the pad oxide layer 11 and the silicon oxide layer 15a causes dislocation of surface atoms of the substrate 10 and reduces the reliability of devices.